Rancang bangun Arithmetic Logic Unit 8 bit pada Spartan 2 field programmable gate array

Denny, Dermawan and Maesa Agny Manggala, Putra and Catur Budi, Waluyo and Bambang, Sudibya (2020) Rancang bangun Arithmetic Logic Unit 8 bit pada Spartan 2 field programmable gate array. Sekolah Tinggi Teknologi Adisutjipto, Yogyakarta.

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13. Rancang Bangun ALU Senatik 2_tambahan.pdf

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As we know, digital systems have been used in everyday life or in industry today because they are more useful than analog systems. Because it is important to develop digital systems, many new digital devices have been designed in complex ways. Some of these devices are called microprocessors, microcontrollers or microchips. It is very important to have very high speed performance in all devices. In this study, a tool was designed, namely, the Arichmetic Logic Unit or it can be called ALU. An important part of Field Programmable Gate Arrays or also known as FPGA, ALU generally has functions to perform arithmetic and logic calculations. Based on the results of the testing of the tools that have been carried out, it can be concluded that the design of the Arichmetic Logic Unit on the Spartan 2 FPGA. with the arithmetic operations performed are the ADDER (A + B) and SUBTRACTOR (A - B) operations, the logical operations performed are the OR (A OR B) and AND (A AND B) operations. It has been simulated and implemented with results that match the specifications of the design.

Item Type: Other
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Sekolah Tinggi Teknologi Adisujtipto > Teknik Elektro
Depositing User: Mr Catur Budi Waluyo
Date Deposited: 07 Jan 2021 05:20
Last Modified: 07 Jan 2021 05:20
URI: http://eprints.stta.ac.id/id/eprint/366

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